Two-dimensional ferroelectric channel transistors integrating ultra-fast memory and neural computing

Abstract

With the advent of the big data era, applications are more data-centric and energy efficiency issues caused by frequent data interactions, due to the physical separation of memory and computing, will become increasingly severe. Emerging technologies have been proposed to perform analog computing with memory to address the dilemma. Ferroelectric memory has become a promising technology due to field-driven fast switching and non-destructive readout, but endurance and miniaturization are limited. Here, we demonstrate the α-In ₂Se ₃ ferroelectric semiconductor channel device that integrates non-volatile memory and neural computation functions. Remarkable performance includes ultra-fast write speed of 40 ns, improved endurance through the internal electric field, flexible adjustment of neural plasticity, ultra-low energy consumption of 234/40 fJ per event for excitation/inhibition, and thermally modulated 94.74% high-precision iris recognition classification simulation. This prototypical demonstration lays the foundation for an integrated memory computing system with high density and energy efficiency.

Abstract

Ferroelectric devices with dielectric layers to modulate channel conductance have limited endurance and miniaturization. Here, the authors demonstrate a 2D ferroelectric channel transistor that integrates memory and computation capabilities, that will support the development of memory and computing fusion systems.