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      High-density chain ferroelectric random access memory (chain FRAM)

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          A 16 kb ferroelectric nonvolatile memory with a bit parallel architecture

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            A 256 kb nonvolatile ferroelectric memory at 3 V and 100 ns

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              A 60-ns 1-Mb nonvolatile ferroelectric memory with a nondriven cell plate line write/read scheme

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                Author and article information

                Journal
                IEEE Journal of Solid-State Circuits
                IEEE J. Solid-State Circuits
                Institute of Electrical and Electronics Engineers (IEEE)
                00189200
                May 1998
                : 33
                : 5
                : 787-792
                Article
                10.1109/4.668994
                e6bb644b-a978-4f31-8366-6ee7dcc579e6
                © 1998
                History

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