Learning is highly important for edge intelligence devices to adapt to different application scenes and owners. Current technologies for training neural networks require moving massive amounts of data between computing and memory units, which hinders the implementation of learning on edge devices. We developed a fully integrated memristor chip with the improvement learning ability and low energy cost. The schemes in the STELLAR architecture, including its learning algorithm, hardware realization, and parallel conductance tuning scheme, are general approaches that facilitate on-chip learning by using a memristor crossbar array, regardless of the type of memristor device. Tasks executed in this study included motion control, image classification, and speech recognition. Memristor-based computing technology has recently received considerable attention because of its potential to overcome the so-called “von Neumann bottleneck” of conventional computing architecture. In particular, memristor technology could realize time- and energy-efficient on-chip learning for various edge intelligence applications, although fully on-chip learning implementation remains challenging. To address this problem, Zhang et al . proposed a memristor-featured sign- and threshold-based learning (STELLAR) architecture. They fabricated a full-system-integrated chip consisting of multiple memristor arrays and all of the necessary complementary metal-oxide semiconductor peripheral circuits to support complete on-chip learning. The authors further demonstrated end-to-end on-chip improvement learning across various tasks, including motion control, image classification, and speech recognition, achieving software-comparable accuracy and low hardware cost. The present work is an important step in the field of computation-in-memory. —Yury Suleymanov A memristor-based chip supporting efficient fully on-chip learning for edge intelligence applications was developed.
