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      A Van Der Waals Reconfigurable Multi‐Valued Logic Device and Circuit Based on Tunable Negative‐Differential‐Resistance Phenomenon

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          Abstract

          Multi‐valued logic (MVL) technology that utilizes more than two logic states has recently been reconsidered because of the demand for greater power saving in current binary logic systems. Extensive efforts have been invested in developing MVL devices with multiple threshold voltages by adopting negative differential transconductance and resistance. In this study, a reconfigurable, multiple negative‐differential‐resistance (m‐NDR) device with an electric‐field‐induced tunability of multiple threshold voltages is reported, which comprises a BP/ReS 2 heterojunction and a ReS 2/ h‐BN/metal capacitor. Tunability for the m‐NDR phenomenon is achieved via the resistance modulation of the ReS 2 layer by electrical pulses applied to the capacitor region. Reconfigurability is verified in terms of the function of an MVL circuit composed of a reconfigurable m‐NDR device and a load transistor, wherein staggered‐type and broken‐type double peak‐NDR device operations are adopted for ternary inverter and latch circuits, respectively.

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          Most cited references33

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          Phosphorene: an unexplored 2D semiconductor with a high hole mobility.

          We introduce the 2D counterpart of layered black phosphorus, which we call phosphorene, as an unexplored p-type semiconducting material. Same as graphene and MoS2, single-layer phosphorene is flexible and can be mechanically exfoliated. We find phosphorene to be stable and, unlike graphene, to have an inherent, direct, and appreciable band gap. Our ab initio calculations indicate that the band gap is direct, depends on the number of layers and the in-layer strain, and is significantly larger than the bulk value of 0.31-0.36 eV. The observed photoluminescence peak of single-layer phosphorene in the visible optical range confirms that the band gap is larger than that of the bulk system. Our transport studies indicate a hole mobility that reflects the structural anisotropy of phosphorene and complements n-type MoS2. At room temperature, our few-layer phosphorene field-effect transistors with 1.0 μm channel length display a high on-current of 194 mA/mm, a high hole field-effect mobility of 286 cm(2)/V·s, and an on/off ratio of up to 10(4). We demonstrate the possibility of phosphorene integration by constructing a 2D CMOS inverter consisting of phosphorene PMOS and MoS2 NMOS transistors.
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            Resonant tunneling in semiconductor double barriers

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              Van der Waals heterostructures and devices

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                Author and article information

                Contributors
                (View ORCID Profile)
                Journal
                Advanced Materials
                Advanced Materials
                Wiley
                0935-9648
                1521-4095
                September 2022
                August 07 2022
                September 2022
                : 34
                : 36
                Affiliations
                [1 ] Department of Electrical and Computer Engineering Sungkyunkwan University (SKKU) Suwon 16419 Korea
                [2 ] Department of Semiconductor and Display Engineering Sungkyunkwan University Suwon 16417 Korea
                [3 ] Memory Technology Design Team Samsung Electronics Co. Ltd Hwasung 18448 Korea
                [4 ] Research Laboratory of Electronics Massachusetts Institute of Technology (MIT) Cambridge MA 02139 USA
                [5 ] School of Advanced Materials Science and Engineering Sungkyunkwan University Suwon 16417 Korea
                [6 ] School of Semiconductor Science & Technology Jeonbuk National University Jeonju 54896 Korea
                [7 ] Sungkyunkwan Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University Suwon 16417 Korea
                Article
                10.1002/adma.202202799
                80cab84f-3f2a-4b8f-8765-97134ea0139a
                © 2022

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