We demonstrate the first (to the best of our knowledge) monolithically integrated linear photonic crystal microcavities in an advanced SOI CMOS microelectronics process (IBM 45nm 12SOI) with no in-foundry process modifications. The cavities were integrated into a standard microelectronics design flow meeting process design rules, and included in a chip set alongside standard microelectronic circuits and microprocessors in the same device layer as transistors. We demonstrate both 1520nm wavelength telecom band and 1180nm cavity designs, using different structures owing to design rule limitations. Loaded Q's of 2,000 and 4,000, and extracted intrinsic loss Q's of the order of 100,000 and 50,000 are demonstrated. We also demonstrate an evanescent coupling geometry which entirely decouples the cavity and waveguide-coupling design, and investigate some of the mode features inherent in this coupling approach. The cavities support extended modes due to the thin device layer that limits optical confinement, and as a result show a family of longitudinal resonant modes. Cavities were designed using a rigorous numerical synthesis based on 3D eigenmode simulation parameter maps.