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      A 12-bit 80-MSample/s pipelined ADC with bootstrapped digital calibration

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          A 10-b 20-Msample/s analog-to-digital converter

          R Ramachandran, T.R. Viswanathan, G.F. Gross … (1992)
          Article 0 comments Cited 81 times – based on 0 reviews     Review now
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            Full-speed testing of A/D converters

            J. Doernberg, H-S Lee, D.A. Hodges (1984)
            Article 0 comments Cited 72 times – based on 0 reviews     Review now
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              A pipelined 5-Msample/s 9-bit analog-to-digital converter

              S.H. Lewis, P.R. Gray (1987)
              Article 0 comments Cited 70 times – based on 0 reviews     Review now
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                Author and article information

                Journal
                Title: IEEE Journal of Solid-State Circuits
                Abbreviated Title: IEEE J. Solid-State Circuits
                Publisher: Institute of Electrical and Electronics Engineers (IEEE)
                ISSN (Print): 0018-9200
                Publication date Created: May 2005
                Publication date (Print): May 2005
                Volume: 40
                Issue: 5
                Pages: 1038-1046
                Article
                DOI: 10.1109/JSSC.2005.845972
                SO-VID: 4a21086a-dbf8-48fa-8294-7654b052d95e
                Copyright © © 2005
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